Name
Title | ||
|---|---|---|
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems |
Abstract | ||
|---|---|---|
In this paper, a fully-pipeline linear systolic array based on adjusted Montgomery's algorithm is presented to perform modular multiplication at extremely high speed. The processing element (PE) consists of only 4 full-adders and 14 flip-flops. Three-stage internal pipelined PE results in a very short critical path with only a one-bit full-adder delay. Thus, it can run at a very high cycle rate. The total execution time for an n-bit modular multiplication is 2n + 11 cycles with only (n/2 + 2) PEs. A modular exponentiation based on it takes (3n + 16.5)n cycles in average. Compared with most published VLSI modular multipliers, the hardware complexity is greatly reduced while keeping very high throughput. Therefore it is a good candidate of the arithmetic units used in the many public-key crypto-systems, e.g. RSA, Elliptic Curve and so on, especially for the embedded applications concerning information security. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1023/A:1021110405895 | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology |
Keywords | Field | DocType |
systolic array,modular-multiplication,modular-exponentiation,pipeline architecture,public-key crypto-system | Computer science,Modular arithmetic,Parallel computing,Systolic array,Multiplier (economics),Real-time computing,Critical path method,Modular design,Very-large-scale integration,Elliptic curve,Modular exponentiation | Journal |
Volume | Issue | ISSN |
33 | 1-2 | null |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xingjun Wu | 1 | 4 | 3.16 |
| Hongyi Chen | 2 | 95 | 10.61 |
| Yihe Sun | 3 | 125 | 14.73 |
| Weixin Gai | 4 | 24 | 10.77 |