Paper Info
Title
Massively Deployable Intelligent Sensors for the Smart Power Grid.
Abstract
This paper investigates a fault tolerant “3-D Heterogeneous Sensor System on a Chip (HSoC)” for meeting the challenges of distributed power grid monitoring, fault detection, and control. In the past, the management of the power system, including detection of power grid faults, their location, and load-sharing has been carried out largely by remote central stations, which has often incurred delays and very costly domino effects. A possible new solution is to use a matrix of distributed fault tolerant sensors that can sense deviations as well as take local actions. A sensing and computing architecture is presented and the issues of defect and fault tolerance, at multiple levels – intra-chip, sensor system, and power system level, are addressed. First we describe the intra chip level fault tolerance which allows the fabrication of 3D devices integrating magnetic field sensors to detect transmission line currents, and on chip processing. Next at the sensor matrix level the system must deal with chip failures and soft errors due to the harsh environment. Therefore the paper focuses on the sensor matrix required for detection of transmission line fault detection and the corresponding distance estimation. In particular, the use of multiple devices at-D-x, -x, D-x, and 2D-x diminishes the probability of loss of detection considerably while simultaneously enhancing the accuracy of fault distance estimates.
Year
DOI
Venue
2010
10.1109/DFT.2010.46
DFT
Keywords
Field
DocType
fault detection,power system,smart power grid,power grid fault,fault tolerance,power grid monitoring,intra chip level fault,fault tolerant,transmission line fault detection,massively deployable intelligent sensors,fault tolerant sensor,fault distance estimate,intelligent sensors,intelligent sensor,transmission line,soft error,chip,computer architecture
Distributed power,Smart grid,Computer science,Intelligent sensor,Fault detection and isolation,Electric power system,Real-time computing,Electronic engineering,Fault tolerance,Grid,Fault indicator
Conference
ISSN
Citations 
PageRank 
1550-5774
5
0.57
References 
Authors
5
2
Name
Order
Citations
PageRank
Vijay K. Jain19354.61
Glenn H. Chapman216734.10