Name
Title | ||
|---|---|---|
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis |
Abstract | ||
|---|---|---|
This paper presents the design consideration of high order digital ΔΣ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (MASH 1-2) is designed and implemented which allows for the input to operate over 75% of the input adder capacity. The number of the output levels is reduced to two bits. The circuit was verified through simulation, ASIC implementation and exhibits high potential for a gigahertz range, low-power monolithic CMOS frequency synthesizer |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/ISCAS.1999.780641 | ISCAS (2) |
Keywords | Field | DocType |
cmos integrated circuits,fractional-n frequency synthesis,third-order mash structure,cmos frequency synthesizer,delta-sigma modulation,application specific integrated circuits,input adder capacity,modulus controller,frequency synthesizers,digital delta-sigma modulator,asic implementation,phase locked loops,noise shaping,circuits,phase noise,frequency synthesizer,delta sigma modulation,bandwidth,delta modulation | Control theory,Adder,Computer science,Electronic engineering,Application-specific integrated circuit,Delta-sigma modulation,Frequency synthesizer,CMOS,Sigma,Electrical engineering,Direct digital synthesizer | Conference |
Volume | ISBN | Citations |
2 | 0-7803-5471-0 | 8 |
PageRank | References | Authors |
3.44 | 0 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lizhong Sun | 1 | 95 | 13.27 |
| Thierry Lepley | 2 | 193 | 11.81 |
| Franck Nozahic | 3 | 8 | 3.44 |
| Amaud Bellissant | 4 | 8 | 3.44 |
| Tad A. Kwasniewski | 5 | 43 | 13.71 |
| Bany Heim | 6 | 8 | 3.44 |