Abstract | ||
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This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This can result in arbitrary loss of precision due to rounding errors and data truncation. On the other hand, a neuroprocessor based on a floating-point bio-inspired model, such as the one presented in this work, is able to capture additional cell properties and accurately mimic cellular behaviors required in many neuroscience experiments. The architecture is prototyped in reconfigurable logic obtaining a flexible and adaptable cell and network structure together with real time performance by using the available floating point hardware resources in parallel. The paper also demonstrates model scalability by combining the basic processor components that describe the soma, dendrite and synapse of organic cells to form more complex neuron structures. |
Year | DOI | Venue |
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2013 | 10.1109/TC.2011.257 | IEEE Trans. Computers |
Keywords | Field | DocType |
data truncation,computer systems organization,hardware neuron models,additional cell property,available floating point hardware,organic cell,high-performance neuroprocessor architecture,cellular behaviors,biophysically accurate foating point,network structure,parallel architectures,compartmental modeling,reconfigurable architectures,floating point arithmetic model,fixed point arithmetic,biophysically accurate floating point neuroprocessors,adaptable cell,reconfigurable logic,processor architecture,floating-point bio-inspired model,performance evaluation,fixed-point model,biophysically accurate neuroprocessor architecture,rounding errors,neuroscience experiments,model scalability,special-purpose and application-based systems,reconfigurable hardware,neurocomputers,neural nets,real-time systems,floating point hardware resources,complex neuron structures,floating point arithmetic,other architecture styles,complex neuron structure,real time systems,decision support systems | Data truncation,Fixed-point arithmetic,Floating point,Computer science,Parallel computing,Real-time computing,Rounding,Artificial neural network,Reconfigurable computing,Microarchitecture,Scalability | Journal |
Volume | Issue | ISSN |
62 | 3 | 0018-9340 |
Citations | PageRank | References |
4 | 0.58 | 17 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yiwei Zhang | 1 | 52 | 12.65 |
Joe McGeehan | 2 | 216 | 30.91 |
Ed Regan | 3 | 4 | 0.58 |
Stephen Kelly | 4 | 4 | 0.58 |
Jose Nunez-Yanez | 5 | 20 | 3.86 |