Title
A Fast-Locking And Wide-Range Reversible Sar Dll
Abstract
A reversible successive approximation register (RSAR) controlled all-digital delay-locked loop (ADDLL) is proposed to achieve fast-lock and wide range operation. The modified binary search algorithm of RSAR scheme is presented. With improved RSAR control-circuits, it could achieve adaptive bandwidth in wide range operation and eliminate the dead lock problem of conventional SAR DLL. The maximal lock-in cycles are reduced down to 42 for the 11-bit RSAR DLL, and its frequency range is from 30 MHz to I GHz in post layout simulation. The layout is done in SMIC 0.13 um CMOS technology, and an active area of 0.2 mm by 0.1 mm is occupied.
Year
DOI
Venue
2009
10.1109/ISCAS.2009.5117925
ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Keywords
Field
DocType
delay lock loop,cmos technology,detectors,jitter,cmos integrated circuits,control systems,binary search,frequency,integrated circuit layout,process control,binary search algorithm,layout,phase locked loops
Integrated circuit layout,Phase-locked loop,Computer science,Shaping,CMOS,Electronic engineering,Bandwidth (signal processing),Jitter,Binary search algorithm,Detector
Conference
Volume
Issue
ISSN
null
null
null
Citations 
PageRank 
References 
0
0.34
6
Authors
3
Name
Order
Citations
PageRank
Lei Wang16554.21
leibo liu2816116.95
Hongyi Chen39510.61