Title
Specification and synthesis of hardware checkpointing and rollback mechanisms
Abstract
The increasing pressure to make hardware resilient to runtime failures has prompted development of design techniques for specific classes of systems, e.g. processors and routers. However, these techniques come at increased design and verification costs, thus limiting their broader application. In this work we describe a methodology for general RTL designs based on the widely usable checkpointing and rollback resiliency mechanism. We take a modeling and language approach that provides an appropriate set of abstractions for the resiliency logic. This cleanly separates the main design behavior from the resiliency behavior, leading to ease of design. Further, as the language abstractions can be automatically synthesized into resiliency logic, our methodology can merge with existing design flows. The concerns of verifying this additional resiliency logic can be addressed by synthesizing behavioral assertions capturing correct behavior. We demonstrate the use of this methodology on four examples, with synthesis for performance and area to estimate the overhead of the additional synthesis logic.
Year
DOI
Venue
2012
10.1145/2228360.2228585
DAC
Keywords
Field
DocType
hardware checkpointing specification,runtime failures,additional resiliency logic,main design behavior,cpr-verilog,checkpointing,additional synthesis logic,design flow,correct behavior,synthesis logic,modeling approach,hardware checkpointing synthesis,hardware description languages,rollback resiliency mechanism,language abstractions,design technique development,general rtl designs,behavioral assertion synthesis,resiliency logic,language approach,hardware checkpointing,backward error recovery,increased design,resiliency behavior,design engineering,rollback mechanism,design technique,formal specification,radiation detectors,hardware,bit error rate,semantics,algorithm design and analysis
USable,Abstraction,Algorithm design,Computer science,Formal specification,Real-time computing,Design flow,Computer hardware,Rollback,Semantics,Embedded system,Hardware description language
Conference
ISSN
ISBN
Citations 
0738-100X
978-1-4503-1199-1
3
PageRank 
References 
Authors
0.44
15
4
Name
Order
Citations
PageRank
Carven Chan1161.55
Daniel Schwartz-Narbonne2204.24
Divjyot Sethi3192.71
Sharad Malik47766691.24