Title
Formal Verification of a Reconfigurable Microprocessor
Year
DOI
Venue
2000
10.1007/3-540-44614-1_84
FPL
Keywords
Field
DocType
reconfigurable microprocessor,formal verification,processor architecture
Computer architecture,Programming paradigm,Computer science,Instruction set,Parallel computing,Microprocessor,Field-programmable gate array,Register-transfer level,Control reconfiguration,Microarchitecture,Formal verification
Conference
ISBN
Citations 
PageRank 
3-540-67899-9
0
0.34
References 
Authors
5
4
Name
Order
Citations
PageRank
Sergej Sawitzki1154.79
Jens Schönherr285.40
Rainer G. Spallek313725.30
Bernd Straube419537.41