Abstract | ||
---|---|---|
Contrasting with the extensive research focusing on nano-devices properties and fabrication, not enough attention is probably given to computing architectures for these devices. This paper describes a method for mapping an FPGA architecture to a nano-device called NASIC (for Nano-ASIC). This mapping is an illustration of the interest of nano- and micro-architecture models stacked to quickly obtain CAD environments for the investigated technologies. |
Year | DOI | Venue |
---|---|---|
2009 | 10.1016/j.mejo.2009.02.001 | Microelectronics Journal |
Keywords | Field | DocType |
micro-architecture model,fpga architecture,extensive research,cad environment,nano-reconfigurable computing,enough attention,nano-devices property,computing architecture,reconfigurable computing,fpga,computer architecture | CAD,Nanoelectronics,Computer Aided Design,Circuit design,Field-programmable gate array,Electronic engineering,Engineering,Nano-,Integrated circuit,Embedded system,Reconfigurable computing | Journal |
Volume | Issue | ISSN |
40 | 4-5 | Microelectronics Journal |
Citations | PageRank | References |
5 | 0.45 | 7 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Loïc Lagadec | 1 | 62 | 12.84 |
Bernard Pottier | 2 | 91 | 19.77 |
Damien Picard | 3 | 26 | 4.16 |