Abstract | ||
---|---|---|
Significant changes in transistor's power-performance characteristic and cross-corner variations in 28nm CMOS technology prompt the need for a new look at sleep transistor design guidelines. This paper evaluated impacts of back-bias, Vt, and gate length and width on sleep transistor design quality. Recommendations were proposed for production design considerations. |
Year | Venue | Keywords |
---|---|---|
2013 | 2013 IEEE 26TH INTERNATIONAL SOC CONFERENCE (SOCC) | cmos integrated circuits |
Field | DocType | ISSN |
Transistor count,BiCMOS,Pass transistor logic,Computer science,CMOS,Electronic engineering,MOSFET,Transistor,Integrated injection logic,Electrical engineering,AND gate | Conference | 2164-1676 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
1 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kaijian Shi | 1 | 65 | 6.47 |