Title
Esd Protection Circuit For 8.5gbps I/Os In 90nm Cmos Technology
Abstract
In this paper we designed an ESD protected CML driver for 8.5Gbps data rate. ESD protection for this circuit is provided with DSCR. A detailed analysis is done on the impact of ESD protection on performance of the driver. It is shown that DSCR offers up to 2.7kV HBM protection with very small impact on performance of the driver.
Year
DOI
Venue
2009
10.1109/CICC.2009.5280729
PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE
Keywords
Field
DocType
electrostatic discharge,signal analysis,jitter,thyristors,cmos integrated circuits,stress,cmos technology
Signal processing,Electrostatic discharge,Computer science,Electronic engineering,CMOS,Data rate,Thyristor,Jitter,Electrical engineering
Conference
Citations 
PageRank 
References 
0
0.34
3
Authors
2
Name
Order
Citations
PageRank
Hossein Sarbishaei142.46
Manoj Sachdev266988.45