Abstract | ||
---|---|---|
The authors propose a run-time re-configurable architecture for local neighborhood image processing. Discussion of how the new architecture can offer improved flexibility to the developer. The authors show that for a satellite image feature extraction application, our architecture, implemented on Stratix II and Virtex 2 field programmable gate arrays, achieves similar performance, hardware resource utilization, and throughput as fully pipelined systolic array architecture |
Year | DOI | Venue |
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2006 | 10.1109/FCCM.2006.13 | Napa, CA |
Keywords | Field | DocType |
image processing,computer architecture,throughput,feature extraction,resource utilization,convolution,color,pixel,field programmable gate arrays,pipelines,systolic array,field programmable gate array | Stratix,Architecture,Computer science,Parallel computing,Systolic array,Image processing,Field-programmable gate array,Feature extraction,Real-time computing,Virtex,Throughput | Conference |
ISBN | Citations | PageRank |
0-7695-2661-6 | 0 | 0.34 |
References | Authors | |
4 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Reid Porter | 1 | 530 | 23.46 |
Janette Frigo | 2 | 128 | 12.56 |
Maya Gokhale | 3 | 1329 | 163.33 |
Christophe Wolinski | 4 | 297 | 28.34 |
François Charot | 5 | 136 | 15.93 |
Charles Wagner | 6 | 14 | 3.82 |