Name
Abstract | ||
|---|---|---|
In the nanometer era, IR-drop has become one of the critical issues in current VLSI designs. Although checking this problem earlier can speed up the analysis, not many tools are available now due to the limited design information. Most existing approaches at gate level require additional characterization to consider the effects of different resistances on supply lines. Therefore, an analytical method is proposed to estimate the IR-drop values without extra information. After modifying the data stored in standard libraries (.lib) and the events stored in activity files (.vcd), using the previous method can also obtain accurate supply current waveforms and IR-drop values for any given supply resistance, as demonstrated by the experiments on several benchmark circuits. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ISCAS.2010.5537092 | ISCAS |
Keywords | Field | DocType |
activity file,standard library,gate level,supply current waveform,nanometer era,dynamic ir drop estimation,vlsi design,gate-level,ir drop estimation,vlsi,integrated circuit design,electric resistance,standard library information,logic gates,supply resistance,propagation delay,capacitance,estimation | Logic gate,Power network design,Propagation delay,Computer science,Waveform,Electronic engineering,Integrated circuit design,Electronic circuit,Very-large-scale integration,Speedup | Conference |
ISSN | ISBN | Citations |
0271-4302 | 978-1-4244-5309-2 | 4 |
PageRank | References | Authors |
0.72 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mu-Shun Matt Lee | 1 | 6 | 1.47 |
| Kuo-Sheng Lai | 2 | 4 | 0.72 |
| Chia-Ling Hsu | 3 | 20 | 6.73 |
| Chien-Nan Jimmy Liu | 4 | 97 | 27.07 |