Name
Abstract | ||
|---|---|---|
An X-net is employed for simplifying interconnections and switch blocks of a multiple-valued reconfigurable VLSI (MV-RVLSI). One cell composed of a logic block and a switch block is connected to four adjacent "X" intersections by four one-bit switches. A multiple-valued X-net data transfer scheme is proposed to improve the utilization of the X-net, where two binary data can be transferred from two adjacent cells to one common adjacent cell simultaneously at each "X" intersection. To evaluate the MV-RVLSIs, a sum-of-absolute-differences operation is mapped onto a previous MV-RVLSI using an 8 nearest-neighbor mesh network (8-NNM) and the MV-RVLSI using the X-net, respectively. The area of the MV-RVLSI based on the multiple-valued X-net data transfer scheme is reduced to 73% and 84%, respectively, in comparison with those of the MVRVLSI using the 8-NNM and the MV-RVLSI based on a binary X-net data transfer scheme. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ISMVL.2013.13 | ISMVL |
Keywords | Field | DocType |
8 nearest-neighbor mesh network,switches,logic circuits,binary x-net data transfer,integrated circuit interconnections,8-nnm,multiple-valued data transfer scheme,binary data transfer,multiple-valued x-net data transfer scheme,area-efficient multiple-valued reconfigurable vlsi architecture,one-bit switch block,logic block,multiple-valued x-net data transfer,switch block,logic block cell,nearest-neighbor mesh network,adjacent cell,vlsi,common adjacent cell,word length 1 bit,x-net,mv-rvlsi,interconnection block,binary data,area-efficient multiple-valued reconfigurable vlsi,previous mv-rvlsi,multiple-valued reconfigurable,reconfigurable vlsi architecture,sum-of-absolute-difference operation | Mesh networking,Logic gate,Data transmission,Computer science,Electronic engineering,Logic block,Binary data,Very-large-scale integration,Binary number,Vlsi architecture | Conference |
ISSN | ISBN | Citations |
0195-623X E-ISBN : 978-0-7695-4976-7 | 978-0-7695-4976-7 | 2 |
PageRank | References | Authors |
0.48 | 8 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xu Bai | 1 | 37 | 9.94 |
| Michitaka Kameyama | 2 | 431 | 99.93 |