Name
Abstract | ||
|---|---|---|
This paper presents a selective scan slice grouping technique for test data compression. In conventional selective encoding methods, the existence of a conflict bit contributes to large encoding data. However, many conflict bits are efficiently removed using the scan slice grouping technique, which leads to a dramatic improvement of encoding efficiency. Experiments performed with large ITC'99 benchmark circuits presents the effectiveness of the proposed technique and the test data volume is reduced up to 92% compared to random-filled test patterns. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1587/transinf.E93.D.380 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS |
Keywords | Field | DocType |
design for testability (DfT), scan testing, SoC test, test data compression | Design for testing,System on a chip,Pattern recognition,Computer science,Algorithm,Coding (social sciences),Test data,Artificial intelligence,Electronic circuit,Data compression,Integrated circuit,Encoding (memory) | Journal |
Volume | Issue | ISSN |
E93D | 2 | 1745-1361 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yong-Joon Kim | 1 | 118 | 13.73 |
| Jaeseok Park | 2 | 19 | 6.05 |
| Sungho Kang | 3 | 436 | 78.44 |