Abstract | ||
---|---|---|
First Page of the Article |
Year | DOI | Venue |
---|---|---|
1996 | 10.1109/TVLSI.1996.486090 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
self-timed design,parallel multiplier,first page,case study,gaas,gallium arsenide,frequency,adders,logic design,floating point | Logic synthesis,Asynchronous communication,Adder,Computer science,Circuit design,Electronic engineering,Real-time computing,Multiplier (economics),Logic family,Electronic circuit,Integrated circuit | Journal |
Volume | Issue | ISSN |
4 | 1 | 1063-8210 |
Citations | PageRank | References |
3 | 0.69 | 1 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
V. Chandramouli | 1 | 3 | 0.69 |
Erik Brunvand | 2 | 509 | 66.09 |
Kent F. Smith | 3 | 24 | 14.40 |