Title
Minimum Energy Near-threshold Network of PLA based Design
Abstract
In recent times, there has been a significant growth in applications for battery powered portable electronics, as well as low power sensor networks. While sub-threshold circuit design approaches can reduce the power consumption significantly, a design operating at sub-threshold voltages is not necessarily optimal in terms of energy consumption. In this paper, we describe a technique to find the energy optimum VDD value for a design, and show that for minimum energy consumption, the circuit should be operated at VDD values which are above the NMOS threshold voltage value. We study this problem in the context of designing a circuit using a network of dynamic NOR-NOR PLAs.
Year
DOI
Venue
2005
10.1109/ICCD.2005.75
ICCD
Keywords
Field
DocType
low power sensor network,sub-threshold circuit design approach,vdd value,design operating,energy consumption,sub-threshold voltage,energy optimum vdd value,minimum energy consumption,power consumption,nmos threshold voltage value,minimum energy near-threshold network,circuit design,integrated circuit design,logic design,threshold voltage,low power electronics,sensor network
Logic optimization,Computer science,Circuit design,Adiabatic circuit,Electronic engineering,Integrated circuit design,Energy consumption,Diode-or circuit,Electrical engineering,Asynchronous circuit,Low-power electronics
Conference
ISSN
ISBN
Citations 
1063-6404
0-7695-2451-6
4
PageRank 
References 
Authors
1.19
13
2
Name
Order
Citations
PageRank
Nikhil Jayakumar121520.42
Sunil P. Khatri21213137.09