Year | DOI | Venue |
---|---|---|
2010 | 10.1109/3DIC.2010.5751467 | 3DIC |
Keywords | Field | DocType |
chip,through silicon via,estimation theory,power dissipation,integrated circuit design,algorithm design and analysis,iterative algorithm,integrated circuit,benchmark testing,iterative methods | Algorithm design,Iterative method,Electronic engineering,Integrated circuit design,Engineering,Estimation theory,Integrated circuit,Die (integrated circuit),Design space exploration,Benchmark (computing) | Conference |
Citations | PageRank | References |
2 | 0.38 | 7 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nauman H. Khan | 1 | 58 | 4.21 |
Sherief Reda | 2 | 1283 | 92.25 |
Soha Hassoun | 3 | 535 | 241.27 |