Title
Design optimizations for microprocessors at low temperature
Abstract
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with supply voltage selection, body bias, transistor sizing and shorter channel length. Reducing channel length provides better frequency and power improvement than forward body bias. When, the leakage power is more than 30 of chip power, combining refrigeration with enhancing technology by shorter channel length provides the best trade-off for power and frequency.
Year
DOI
Venue
2004
10.1145/996566.996570
DAC
Keywords
Field
DocType
system power,body bias,better frequency,chip power,low temperature,channel length,leakage power,shorter channel length,forward body bias,power improvement,design optimizations,microprocessor frequency,circuits,temperature,frequency,power,chip,cmos,refrigeration,design optimization,cmos technology
Refrigeration,Leakage (electronics),Computer science,Voltage,Microprocessor,Communication channel,Electronic engineering,CMOS,Chip,Electronic circuit,Electrical engineering
Conference
ISSN
ISBN
Citations 
0738-100X
1-58113-828-8
2
PageRank 
References 
Authors
0.52
1
9
Name
Order
Citations
PageRank
Arman Vassighi151.41
Ali Keshavarzi21270179.92
Siva Narendra31352189.19
Gerhard Schrom410920.56
Yibin Ye540680.88
Seri Lee620.52
Greg Chrysler7243.43
Manoj Sachdev866988.45
Vivek De93024577.83