Paper Info
Title
A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays
Abstract
Development of modern integrated circuit technologies makes it feasible to develop cheaper, faster and smaller special purpose signal processing function circuits. Digital Signal processing functions are generally implemented either on ASICs with inflexibility, or on FPGAs with bottlenecks of relatively smaller utilization factor or lower speed compared to ASIC. Field Programmable DSP Array (FPDA) is the proposed DSP dedicated device, redolent to FPGA, but with basic fixed common modules (CMs) (like adders, subtractors, multipliers, scaling units, shifters) instead of CLBs. This paper introduces the development of reconfigurable system architecture with a focus on FPDA that integrates different DSP functions like DFT, FFT, DCT, FIR, IIR, and DWT etc. The switching between DSP functions is occurred by reconfiguring the interconnection between CMs. Validation of the proposed architecture has been achieved on Virtex5 FPGA. The architecture provides sufficient amount of flexibility, parallelism and scalability.
Year
DOI
Venue
2013
10.1145/2490302.2490304
ACM Sigarch Computer Architecture News
Keywords
DocType
Volume
virtex5 fpga,different dsp function,field programmable dsp array,processing function circuit,efficient mapping,dsp processor,novel reconfigurable architecture,digital signal processing function,smaller special purpose signal,dsp function,programmable dsp array,reconfigurable system architecture,proposed dsp,proposed architecture
Journal
41
Issue
ISSN
Citations 
2
ACM SIGARCH Computer Architecture News, Volume 41 Issue 2, May 2013, Pages 1-8
0
PageRank 
References 
Authors
0.34
9
4
Name
Order
Citations
PageRank
Amitabha Sinha1147.00
Mitrava Sarkar200.68
Soumojit Acharyya300.68
Suranjan Chakraborty420616.18