Name
Abstract | ||
|---|---|---|
As VLSI technology advances and memories occupy more and more area in a typical SOC, memory diagnosis has become an important issue. In this paper, we propose the Memory Failure Pattern Analyzer (MFPA), which is developed for different memories and technologies that are currently used in the industry. The MFPA can locate weak regions of the memory array, i.e., those with high failure rate. It can also be used to analyze faulty-cell/defect distributions automatically. We also propose a new defect distribution model which has 1-12 times higher accuracy than other theoretical models. Based on this model, we propose a defect-spectrum-based methodology to identify critical failure patterns from failure bitmaps. These failure patterns can further be translated to corresponding defects by our memory fault simulator (RAMSES) and physical-level failure analysis tool (FAME). In an industrial case, the MFPA fits the defect distribution with the proposed model, which has 12 times higher accuracy than the Poisson distribution. With our model, it further identifies two special failure patterns from 132,488 faulty 4-Mb macros in 1.2 minutes. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/VTS.2012.6231059 | VTS |
Keywords | Field | DocType |
storage capacity 4 mbit,statistical distributions,memory diagnosis,defect-spectrum-based methodology,poisson distribution,faulty-cell analysis,integrated circuit reliability,memory fault simulator,soc,parameter estimation,physical-level failure analysis tool,ramses,memory repair,memory array,vlsi technology,defect distribution model,system-on-chip,mfpa,storage management chips,yield improvement,failure analysis,fault diagnosis,vlsi,memory failure pattern analyzer,redundancy analysis,fame,time 1.2 min,builtin-self-repair (bisr),critical failure pattern identification,maintenance engineering,redundancy,system on chip | System on a chip,Computer science,Failure rate,Electronic engineering,Real-time computing,Redundancy (engineering),Probability distribution,Bitmap,Fault Simulator,Very-large-scale integration,Maintenance engineering | Conference |
ISSN | ISBN | Citations |
1093-0167 | 978-1-4673-1073-4 | 4 |
PageRank | References | Authors |
0.44 | 8 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lin, Bing-Yang | 1 | 14 | 4.59 |
| Mincent Lee | 2 | 49 | 6.05 |
| Wu, Cheng-Wen | 3 | 1843 | 170.44 |