Paper Info
Title
Hardware budget and runtime system for data-driven multithreaded chip multiprocessor
Abstract
The Data-Driven Multithreading Chip Multiprocessor (DDM-CMP) architecture has been shown to overcome the power and memory wall limitations by combining two key technologies: the use of the Data-Driven Multithreading (DDM) model of execution, and the Chip-Multiprocessor architecture. DDM is able to hide memory and synchronization latencies providing significant performance gains whereas the use of of the CMP architecture offers high-degree of parallelism at low complexity design and is therefore power efficient. This paper presents the hardware budget analysis and the runtime support system for the DDM-CMP architecture. The hardware analysis shows that the DDM benefits may be achieved with only a 17% hardware cost increase compared to a traditional chip-multiprocessor implementation. The support for the runtime system was designed in such a way that allows the DDM applications to execute on the DDM-CMP chip using a regular, non-modified, Operating System and CPU cores.
Year
DOI
Venue
2006
10.1007/11859802_20
Asia-Pacific Computer Systems Architecture Conference
Keywords
Field
DocType
hardware cost increase,cmp architecture,hardware budget analysis,data-driven multithreaded chip multiprocessor,ddm benefit,chip-multiprocessor architecture,runtime system,hardware analysis,ddm application,data-driven multithreading,ddm-cmp chip,ddm-cmp architecture,power efficiency,operating system,chip
Data modeling,Multithreading,Synchronization,Content-addressable memory,Computer science,Multiprocessing,Chip,Computer hardware,Multi-core processor,Embedded system,Distributed computing,Runtime system
Conference
Volume
ISSN
ISBN
4186
0302-9743
3-540-40056-7
Citations 
PageRank 
References 
1
0.42
11
Authors
3
Name
Order
Citations
PageRank
Kyriakos Stavrou11038.61
Pedro Trancoso237743.79
Paraskevas Evripidou331334.69