Name
Abstract | ||
|---|---|---|
The flash memory solid-state disk (SSD) is emerging as a killer application for NAND flash memory due to its high performance and low power consumption. To attain high write performance, recent SSDs use an internal SDRAM write buffer and parallel architecture that uses interleaving techniques. In such architecture, coarse-grained address mapping called superblock mapping is inevitably used to exploit the parallel architecture. However, superblock mapping shows poor performance for random write requests. In this paper, we propose a novel victim block selection policy for the write buffer considering the parallel architecture of SSD. We also propose a multi-level address mapping scheme that supports small-sized write requests while utilizing the parallel architecture. Experimental results show that the proposed scheme improves the I/O performance of SSD by up to 64% compared to the existing technique. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1016/j.sysarc.2010.03.006 | Journal of Systems Architecture - Embedded Systems Design |
Keywords | Field | DocType |
poor performance,flash translation layer,buffer management,o performance,flash memory,parallel architecture,coarse-grained address mapping,multi-level address mapping scheme,nand flash memory,address mapping,superblock mapping,flash memory solid-state disk,solid state disk,proposed scheme,high performance | Architecture,Flash memory,Flash file system,Address mapping,Computer science,Parallel computing,Write buffer,Real-time computing,Exploit,Write combining,Computer hardware,Interleaving | Journal |
Volume | Issue | ISSN |
56 | 4-6 | Journal of Systems Architecture |
Citations | PageRank | References |
5 | 0.47 | 12 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyunchul Park | 1 | 341 | 17.56 |
| Dongkun Shin | 2 | 1226 | 67.83 |