Title
A unified approach in the analysis of latches and flip-flops for low-power systems
Abstract
In this paper we propose a set of rules for consistent estimation of the real performance and power features of the latch and flip-flop structures. A new simulation and optimization approach is presented, targeting both high-performance and power budget issues. The analysis approach reveals the sources of performance and power consumption bottlenecks in different design styles. Certain misleading parameters have been properly modified and weighted to reflect the real properties of the compared structures. Furthermore, the results of the comparison of representative latches and flip-flops illustrate the advantages of our approach and the suitability of different design styles for low-power and high-performance applications.
Year
DOI
Venue
1998
10.1145/280756.280911
ISLPED
Keywords
Field
DocType
unified approach,different design style,power feature,low-power system,analysis approach,optimization approach,real performance,real property,power budget issue,certain misleading parameter,high-performance application,power consumption bottleneck,simulation,consistent estimator,low power electronics,optimization
Power budget,Consistent Estimation,FLOPS,Computer science,Electric power system,Design styles,Real-time computing,Electronic engineering,Flip-flop,Low-power electronics,Power consumption
Conference
ISBN
Citations 
PageRank 
1-58113-059-7
12
8.29
References 
Authors
5
3
Name
Order
Citations
PageRank
Vladimir Stojanovic11410155.48
Vojin G. Oklobdzija2806137.25
raminder s bajwa311418.94