Paper Info
Title
Hot-and-Cold: using criticality in the design of energy-efficient caches
Abstract
As technology scales and processor speeds improve, power has become a first-order design constraint in all aspects of processor design. In this paper, we explore the use of criticality metrics to reduce dynamic and leakage energy within data caches. We leverage the ability to predict whether an access is in the application’s critical path to partition the accesses into multiple streams. Accesses in the critical path are serviced by a high-performance (hot) cache bank. Accesses not in the critical path are serviced by a lower energy (and lower performance (cold)) cache bank. The resulting organization is a physically banked cache with different levels of energy consumption and performance in each bank. Our results demonstrate that such a classification of instructions and data across two streams can be achieved with high accuracy. Each additional cycle in the cold cache access time slows performance down by only 0.8%. However, such a partition can increase contention for cache banks and entail non-negligible hardware overhead. While prior research has effectively employed criticality metrics to reduce power in arithmetic units, our analysis shows that the success of these techniques are limited when applied to data caches.
Year
DOI
Venue
2003
10.1007/978-3-540-28641-7_13
PACS
Keywords
Field
DocType
cold cache access time,leakage energy,energy consumption,lower energy,criticality metrics,data cache,critical path,banked cache,energy-efficient cache,lower performance,cache bank,energy efficient
Cache invalidation,Cache pollution,Cache,CPU cache,Cache algorithms,Page cache,Critical path method,Engineering,Energy consumption,Embedded system
Conference
Volume
ISSN
ISBN
3164
0302-9743
3-540-24031-4
Citations 
PageRank 
References 
6
0.50
28
Authors
4
Name
Order
Citations
PageRank
Rajeev Balasubramonian12302116.79
Vijayalakshmi Srinivasan2107783.50
Sandhya Dwarkadas33504257.31
Alper Buyuktosunoglu41675115.30