Name
Abstract | ||
|---|---|---|
This paper presents the design and implementation of an L1/L2 dual-band global positioning system (GPS) receiver. Dual-conversion with a low-IF architecture was used for dual-band operation. The receiver is composed of an RF pream-plifier, down-conversion mixers, a variable-gain channel filter, a 2-bit analog-to-digital converter, and the full phase-locked-loop synthesizer including an on-chip voltage controlled oscillator. Fabricated in a 0.18-mu m CMOS technology, the receiver exhibits maximum gain of 95 dB and noise figures of 8.5 and 7.5 dB for L1 and L2, respectively. An on-chip variable-gain channel filter provides IF image rejection of 20 dB and gain control range over 60 dB. The receiver consumes 19 mW from a 1.8-V supply while occupying a 2.6-mm(2) die area including the ESD I/O pads. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/JSSC.2005.847326 | IEEE JOURNAL OF SOLID-STATE CIRCUITS |
Keywords | DocType | Volume |
CMOS RF receiver, global positioning system (GPS), image-rejection complex filter, low IF, satellite communications, wireless communications | Journal | 40 |
Issue | ISSN | Citations |
7 | 0018-9200 | 27 |
PageRank | References | Authors |
3.45 | 15 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jinho Ko | 1 | 58 | 8.22 |
| Jongmoon Kim | 2 | 31 | 4.64 |
| Sang-Hyun Cho | 3 | 143 | 21.38 |
| Kwyro Lee | 4 | 265 | 70.73 |