Name
Abstract | ||
|---|---|---|
Analog IC test occupies a significant fractionof the design cycle. Testing costs are increased by thetwin requirements of high precision and accuracy in signalmeasurement. We discuss a system level ACOB techniquefor fully differential analog ICs. Our test techniques incorporateanalog specific constraints such as device matching,and circuit and switching noise. They have a minimal impacton performance, area and power. The techniques canbe used for both discrete and continuous time... |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/4.540065 | IEEE Journal of Solid-state Circuits |
Keywords | Field | DocType |
system-level design,differential analog circuit,analog circuits,optimization,frequency,system level design,system testing | Analogue electronics,Analog device,Analog multiplier,Fault coverage,Computer science,Real-time computing,Electronic engineering,Switched capacitor,Mixed-signal integrated circuit,High impedance,Linear circuit | Conference |
Volume | Issue | ISSN |
31 | 10 | 0018-9200 |
ISBN | Citations | PageRank |
0-89791-725-1 | 6 | 0.96 |
References | Authors | |
6 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bapiraju Vinnakota | 1 | 237 | 25.36 |
| Ramesh Harjani | 2 | 242 | 52.65 |
| Nicholas J. Stessman | 3 | 10 | 1.47 |