Name
Abstract | ||
|---|---|---|
Typical control flows for real-time ASICs exhibit complex decision making, and therefore require extensive flag/condition handling and branching. The logic implementation of this part of the controller often requires an excessive amount of silicon area and limits the throughput of the controller and consequently of the complete ASIC. In this paper, we present novel methods for improving these area and timing characteristics in large microcoded controllers, based on their functional characteristics encountered in typical examples. For the flag and condition handling logic, we use the fact that many flags are needed simultaneously for efficient complex branching and that these are used at different timesteps and thus have a very long lifetime. For the branch generation, we observe that the complexity of the sequencer can be reduced best by use of an incrementer. |
Year | Venue | Keywords |
|---|---|---|
1992 | Proceedings of the IFIP WG10.2/WG10.5 Workshops on Synthesis for Control Dominated Circuits | branch assignment,large microcoded controllers,condition handling |
Field | DocType | Volume |
Computer science,Parallel computing,Real-time computing | Conference | 22 |
ISSN | ISBN | Citations |
0926-5473 | 0-444-81479-5 | 2 |
PageRank | References | Authors |
0.66 | 1 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Augusli Kifli | 1 | 79 | 19.01 |
| R. De Wulf | 2 | 2 | 0.66 |
| Zegers, J. | 3 | 9 | 2.23 |
| Gert Goossens | 4 | 293 | 63.59 |
| Paul Six | 5 | 25 | 3.83 |
| Hugo De Man | 6 | 2177 | 257.77 |