Name
Abstract | ||
|---|---|---|
This paper presents the implementation of a fault detection and correction technique used to design a robust 8051 micro-controller with respect to a particular transient fault called Single Event Upset (SEU). A specific study regarding the effects of a SEU in the micro-controller behavior was performed. Furthermore, a fault tolerant technique was implemented in a version of the 8051. The VHDL description of the fault-tolerant microprocessor was prototyped in a FPGA environment and results in terms of area overhead, level of protection and performance penalties are discussed. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1023/A:1011125927317 | J. Electronic Testing |
Keywords | Field | DocType |
8051-like micro-controller tolerant,particular transient fault,vhdl description,fault-tolerant microprocessor,single event,correction technique,fault tolerant technique,fpga environment,transient faults,micro-controller behavior,fault detection,area overhead | Computer science,Fault detection and isolation,Microprocessor,Field-programmable gate array,Real-time computing,Electronic engineering,Aerospace testing,Fault tolerance,Microcontroller,VHDL,Single event upset,Embedded system | Journal |
Volume | Issue | ISSN |
17 | 2 | 1573-0727 |
Citations | PageRank | References |
6 | 0.64 | 3 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Érika Cota | 1 | 53 | 3.87 |
| Fernanda Lima | 2 | 68 | 7.43 |
| Sana Rezgui | 3 | 16 | 2.48 |
| Luigi Carro | 4 | 1393 | 166.42 |
| Raoul Velazco | 5 | 124 | 19.48 |
| Marcelo Lubaszewski | 6 | 483 | 47.66 |
| Ricardo Reis | 7 | 14 | 2.81 |