Name
Title | ||
|---|---|---|
A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays |
Abstract | ||
|---|---|---|
A test-structure comprising a dual-slope integrating analog-to-digital converter, auto-zeroing circuitry, digital control logic and a large array of devices under test (DUTs) has been developed to isolate threshold voltage variation. Threshold-voltage (VT) isolation is achieved by testing all DUTs in the subthreshold regime where drain-to-source current is an exponential function of VT. Spice simulations show that the structure is at least an order of magnitude more sensitive to VT variation than to channel length variation. This, in combination with a hierarchical access scheme and leakage control system, allows efficient characterization of DeltaVT for ~70,000 NMOS and ~70,000 PMOS devices in a dense 2mm times 2mm DUT array |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/ISQED.2007.24 | San Jose, CA |
Keywords | Field | DocType |
vt variation,dut array,threshold voltage variation,large mosfet arrays,length variation,auto-zeroing circuitry,pmos device,large array,leakage control system,digital control logic,efficiently study threshold-voltage variation,analog-to-digital converter,threshold voltage,device under test,logic circuits,integrated circuit design,digital control,exponential function,cmos integrated circuits,control system | Logic gate,Leakage (electronics),NMOS logic,Computer science,CMOS,Electronic engineering,Subthreshold conduction,PMOS logic,MOSFET,Threshold voltage,Electrical engineering | Conference |
ISBN | Citations | PageRank |
0-7695-2795-7 | 14 | 3.64 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nigel Drego | 1 | 32 | 15.94 |
| Anantha P. Chandrakasan | 2 | 14442 | 1946.93 |
| Duane Boning | 3 | 201 | 49.37 |