Abstract | ||
---|---|---|
Security has been considered as an important issue in processor design. Most of the existing designs of security handling assume the chip as a single secure unit. However, such assumption is vulnerable to exposure resulted from a central failure point. In this article, we propose a secure Chip-Multiprocessor architecture (SecCMP) to handle security related problems such as key protection and core authentication in multi-core systems. Matching the nature of multi-core systems, a distributed threshold secret sharing scheme is employed to protect critical secrets. A critical secret (e.g., encryption key) is divided into multiple shares and distributed among multiple cores instead of being kept a single copy in one core that is sensitive to exposure. The proposed SecCMP can not only enhance the security and fault-tolerance in secret protection but also support core authentication. SecCMP is designed to be an efficient and secure architecture for CMPs. |
Year | DOI | Venue |
---|---|---|
2008 | 10.4018/jisp.2008100103 | INTERNATIONAL JOURNAL OF INFORMATION SECURITY AND PRIVACY |
Keywords | Field | DocType |
Cybernetics, Data Sharing, Front-End Computers, Processor Architecture | Secure multi-party computation,Authentication,Secret sharing,Computer science,Distributed System Security Architecture,Computer security,Data sharing,Processor design,Key (cryptography),Microarchitecture | Journal |
Volume | Issue | ISSN |
2 | 4 | 1930-1650 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Li Yang | 1 | 0 | 0.34 |
Peng Lu | 2 | 126 | 17.62 |
Balachandran Ramadass | 3 | 14 | 0.97 |