Title
A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template
Abstract
As modern areas of application for coarse-grained re- configurable systems digital signal processing, multime- dia in embedded devices, and wireless communication can be mentioned among others. These fields include dif- ferent algorithms with varying complexity and speed re- quirements. In this paper a new highly parameterizable coarse-grained reconfigurable architecture called weakly programmable processor array is discussed. It consists of several weakly programmable processing elements with a VLIW (Very Large Instruction Word) architecture which are connected with the help of dynamically reconfigurable in- terconnect modules.
Year
Venue
Keywords
2006
ReCoSoC
digital signal processing,wireless communication
Field
DocType
Citations 
Architecture,Computer architecture,Processor array,Computer science,Parallel computing,Real-time computing
Conference
8
PageRank 
References 
Authors
0.71
7
4
Name
Order
Citations
PageRank
Dmitrij Kissler1787.30
Frank Hannig259575.66
Alexey Kupriyanov3796.40
Jürgen Teich42886273.54