Name
Abstract | ||
|---|---|---|
SystemC is a widespread language for HW/SW system simulation and design exploration, and thus a key development platform in embedded system design. However, the growing complexity of SoC designs is having an impact on simulation performance, leading to limited SoC exploration potential, which in turns affects development and verification schedules and time-to-market for new designs. Previous efforts have attempted to parallelize SystemC simulation, targeting both multiprocessors and GPUs. However, for practical designs, those approaches fall far short of satisfactory performance. This paper proposes SAGA, a novel simulation approach that fully exploits the intrinsic parallelism of RTL SystemC descriptions, targeting GPU platforms. By limiting synchronization events with ad-hoc static scheduling and separate independent dataflows, we shows that we can simulate complex SystemC descriptions up to 16 times faster than traditional simulators. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1145/2228360.2228382 | DAC |
Keywords | Field | DocType |
complex systemc description,key development platform,embedded system design,systemc acceleration,systemc simulation,gpu architecture,novel simulation approach,design exploration,sw system simulation,soc design,simulation performance,rtl systemc description,computer architecture,instruction sets,system on chip,circuit complexity,concurrent computing,schedules,synchronization,integrated circuit design,kernel | Synchronization,System on a chip,Instruction set,CUDA,Computer science,Parallel computing,Real-time computing,SystemC,Schedule,Concurrent computing,Graphics processing unit,Embedded system | Conference |
ISSN | Citations | PageRank |
0738-100X | 16 | 0.85 |
References | Authors | |
4 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sara Vinco | 1 | 87 | 12.05 |
| Debapriya Chatterjee | 2 | 115 | 7.87 |
| Valeria Bertacco | 3 | 1365 | 86.93 |
| Franco Fummi | 4 | 1001 | 111.62 |