Abstract | ||
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Dynamic binary translation has been extensively used in porting applications from one platform to another at runtime. At the same time, reconfigurable computing has been commonly employed for hardware acceleration for compute-intensive applications. In this paper we attempt to understand the technical challenges of applying dynamic binary translation to a reconfigurable computing environment, when the translation focus is on-the-fly acceleration. |
Year | DOI | Venue |
---|---|---|
2011 | 10.1145/2024724.2024792 | DAC |
Keywords | DocType | ISSN |
reconfigurable computing environment,reconfigurable target,compute-intensive application,technical challenge,hardware acceleration,dynamic binary translation,on-the-fly acceleration,translation focus,porting application,reconfigurable computing,hardware accelerator,acceleration,pattern matching,field programmable gate arrays,field programmable gate array,computer architecture,software portability,algorithm design,algorithm design and analysis,heuristic algorithm,real time systems | Conference | 0738-100X |
ISBN | Citations | PageRank |
978-1-4503-0636-2 | 1 | 0.37 |
References | Authors | |
1 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Phillip Kinsman | 1 | 4 | 0.98 |
Nicola Nicolici | 2 | 807 | 59.91 |