Paper Info
Title
A Hardware Algorithm for Variable-Precision Logarithm
Abstract
This paper presents an efficient hardware algorithm for variable-precision logarithm. The algorithm uses an iterative technique that employs table lookups and polynomial approximations. Compared to similar algorithms, it reduces the number of fixed-precision operations by avoiding full precision computations and dynamically varying the precision of intermediate results. It also uses significantly smaller tables than related algorithms. Fora specified hardware implementation, the algorithm requires fewer than 2 x L**2 fixed-precision multiplications to evaluate the logarithm to L words of precision. An error analysis for the algorithm is also presented.
Year
DOI
Venue
2000
10.1109/ASAP.2000.862392
ASAP
Keywords
Field
DocType
fora specified hardware implementation,l word,efficient hardware algorithm,hardware algorithm,variable-precision logarithm,similar algorithm,full precision computation,error analysis,fixed-precision operation,fixed-precision multiplication,related algorithm,iterative methods,arithmetic,algorithm design and analysis,hardware,packaging,polynomials,tellurium,computer architecture
Binary logarithm,Algorithm design,Polynomial,Iterative method,Computer science,Parallel computing,Hardware algorithm,Iterated logarithm,Logarithm,Computation
Conference
ISSN
ISBN
Citations 
1063-6862
0-7695-0716-6
5
PageRank 
References 
Authors
0.46
8
3
Name
Order
Citations
PageRank
Javier Hormigo111319.45
Julio Villalba221923.56
Michael J. Schulte3101587.86