Title
A 4gs/S, 8.45 Enob And 5.7fj/Conversion, Digital Assisted, Sampling System In 45nm Cmos Soi
Abstract
A 4GS/s sampling system achieved 8.45-ENOB linearity with 5.7fJ/conversion energy efficiency at 1V power supply and its gain can be adjusted in a digital manner. The measured IIP3 and IIP2 are 17.7dBm and 40dBm respectively. The ENOB of the sampler shows no degradation up to Nyquist frequency. An integrated phase rotator allows digital clock delay and duty cycle adjustment with sub-picosecond resolution. The sampling system tracks and settles in 1/4UI (62.5ps). Realized in a 45nm SOI CMOS the active area of the sampler is only 0.2x0.2mm(2).
Year
DOI
Venue
2011
10.1109/CICC.2011.6055383
2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)
Keywords
Field
DocType
energy efficient,duty cycle,silicon on insulator
Silicon on insulator,Duty cycle,Efficient energy use,Nyquist frequency,Computer science,Linearity,Sampling system,Electronic engineering,Effective number of bits,Digital clock,Electrical engineering
Conference
Citations 
PageRank 
References 
1
0.37
5
Authors
3
Name
Order
Citations
PageRank
Mihai A. T. Sanduleanu13210.00
Scott K. Reynolds227168.08
Jean-Olivier Plouchart310620.36