Title
A Power Efficient Mdac Design With Correlated Double Sampling For A 2-Step-Flash Adc
Abstract
This paper describes implementation issues for high speed 2-step-flash analog-to-digital converters (ADCs) without digital correction. A novel implementation for a multiplying digital-to-analog converter (MDAC) is described, which is a sample-and-hold amplifier, which includes a DAC, residue amplification and correlated double sampling (CDS), thereby omitting two-phase compensation differences. No digital correction is needed because linearity of the 2-step-flash ADC is provided by a capacitor-array matching and CDS prevents missing codes due to offset in the MDAC.
Year
DOI
Venue
2012
10.1109/ISCAS.2012.6271987
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012)
Keywords
Field
DocType
amplifiers,correlated double sampling,frequency response,resistance,capacitors,switches
Flight dynamics (spacecraft),Correlated double sampling,Frequency response,Control theory,Computer science,Linearity,Electronic engineering,Converters,Flash ADC,Offset (computer science),Amplifier
Conference
ISSN
Citations 
PageRank 
0271-4302
2
0.51
References 
Authors
2
3
Name
Order
Citations
PageRank
Rudolf Ritter1184.41
John G. Kauffman2369.06
Maurits Ortmanns3501114.46