John G. Kauffman - Citegraph

Author Info

Name	Affiliation	Papers
JOHN G. KAUFFMAN	Univ Ulm, Inst Microelect, D-89081 Ulm, Germany	18
Collaborators	Citations	PageRank
23	36	9.06
Referers	Referees	References
122	112	48

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100122

Publications (18 rows)

Collaborators (23 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Minimizing Signal-Dependent Residue in CT Pipelined ADCs	0	0.34	2021
FIR Filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators	0	0.34	2021
Influence Of Excess Loop Delay On The Stf Of Continuous-Time Delta-Sigma Modulators	0	0.34	2021
FIR DACs in CT Incremental Delta-Sigma Modulators	0	0.34	2020
A Comparative Study of ISI Errors in Different DAC Structures for CT Delta-Sigma Modulators	0	0.34	2020
A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection.	5	0.57	2016
A 1.92-GS/s CT ΔΣ modulator with 70-db DR and 78-db SFDR in 15-MHz bandwidth	0	0.34	2014
A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW.	8	0.79	2014
Analysis and design of high speed/high linearity continuous time delta-sigma modulator	2	0.70	2013
Integrator swing reduction in feedback compensated Sigma-Delta modulators	2	0.37	2013
A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW.	2	0.44	2012
A Power Efficient Mdac Design With Correlated Double Sampling For A 2-Step-Flash Adc	2	0.51	2012
A reconfigurable Continuous-Time ΔΣ-ADC using a digitally programmable g m -C array	0	0.34	2012
PVT robust design of wideband CT delta sigma modulators including finite GBW compensation	1	0.35	2012
An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal	0	0.34	2012
A Correlation-Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs.	4	0.59	2011
An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.	0	0.34	2011
An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization	10	1.69	2011

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