Paper Info
Title
Fast settling frequency synthesizer with two-point channel control paths
Abstract
A frequency synthesizer with low-power and very short settling time is introduced, which utilizes two-point channel control paths. While the main-path is the same as normal channel controls, a digital-to-analog converter (DAC) with tunable gain is used for the compensation-path to form a feed-forward direct voltage-controlled oscillator (VCO) control path. When the two paths are ideally matched, the two-point control can show zero settling time regardless of the amount of frequency change. However, the settling time performance can be significantly degraded if there exists any mismatch between the two paths. In order to remove the mismatch, a simple compensation method combining a linearized VCO with a resistor-loaded tunable DAC is presented. We show that the overall mismatch can be effectively tuned out by controlling the DAC load resistor, since the mismatch caused by process–voltage–temperature variations is dominated by the resistor variation. We have achieved near-zero settling time for 75thinspaceMHz frequency jumping from 2.4 GHz even with the use of narrow phase-locked loop (PLL) bandwidth of 20 kHz. When the phase noise at 1 MHz offset from 2.4 GHz is − 116.6dBc/ Hz, the total PLL power consumption using 0.18 µm CMOS technology is only 4.2 mW. Copyright © 2011 John Wiley & Sons, Ltd. (A frequency synthesizer with two-point channel control composed of main-and compensation-paths is introduced for fast settling time performance. Any mismatch between the two paths is effectively tuned out by controlling the combined gain of a linearized VCO and a resistor loaded tunable DAC. Even for a narrow 20 kHz PLL bandwidth, the synthesizer achieved near zero settling time at 2.4 GHz, with phase noise of −116.6 dBc/Hz at 1 MHz offset and total power consumption of 4.2 mW.)
Year
DOI
Venue
2012
10.1002/cta.772
I. J. Circuit Theory and Applications
Keywords
Field
DocType
overall mismatch,short settling time,linearized vco,frequency change,control path,zero settling time,two-point channel control path,frequency synthesizer,time performance,dac load resistor,phase noise,settling time
Phase-locked loop,Switching time,Control theory,Settling time,Phase noise,Electronic engineering,Frequency synthesizer,Voltage-controlled oscillator,Bandwidth (signal processing),Resistor,Mathematics
Journal
Volume
Issue
ISSN
40
10
0098-9886
Citations 
PageRank 
References 
1
0.35
4
Authors
2
Name
Order
Citations
PageRank
Sang-Ho Shin142041.46
Sung-Mo Steve Kang21198213.14