Name
Title | ||
|---|---|---|
Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath |
Abstract | ||
|---|---|---|
This paper presents a low-power LDPC decoder design for additive white Gaussian noise (AWGN) channels. The proposed decoding scheme provides constant-time decoding and thus facilitates real-time applications where guaranteed data rate is required. It ... |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/VLSI.Design.2009.33 | VLSI Design |
Keywords | Field | DocType |
energy-delay-area efficient coarse-grain reconfigurable,design-space exploration,low-power ldpc decoder design,guaranteed data rate,facilitates real-time application,additive white gaussian noise,proposed decoding scheme,constant-time decoding,vlsi design,transistors,vlsi,cmos integrated circuits,integrated circuit design,logic gates,cmos,energy optimization,registers,delta modulation | Datapath,Logic gate,Computer science,CMOS,Real-time computing,Electronic engineering,Dynamic demand,Integrated circuit design,Design space exploration,Very-large-scale integration,Clock rate | Conference |
ISSN | Citations | PageRank |
1063-9667 | 8 | 0.66 |
References | Authors | |
5 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sohan Purohit | 1 | 62 | 8.50 |
| Marco Lanuzza | 2 | 203 | 28.64 |
| Stefania Perri | 3 | 264 | 33.11 |
| Pasquale Corsonello | 4 | 278 | 38.06 |
| Martin Margala | 5 | 318 | 55.78 |