Name
Abstract | ||
|---|---|---|
Array multipliers, due to their high regularity, are efficiently designed as parts of complex VLSI devices. Such embedded multipliers have low controllability and observability, making the use of appropriate BIST schemes a necessity. This paper introduces a very effective BIST scheme for carry-propagate and carry-save array multipliers. The deterministic BIST patterns produced by the Test Pattern Generator provide a fault coverage larger than 99%. The required Test Pattern Generator consists of a simple binary counter or maximum length LFSR of a fixed size (8-bits), independent of the size of the multiplier. For Output Data Evaluation a count-based scheme is adopted. The novel BIST scheme does not require any DFT in the multiplier design and is generic, i.e. independent of specific implementations of the multiplier cells. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/ATS.1995.485349 | Asian Test Symposium |
Keywords | Field | DocType |
effective bist scheme,deterministic bist pattern,carry-save array multiplier,multiplier cell,novel bist scheme,embedded multiplier,carry-propagate array multiplier,count-based scheme,appropriate bist scheme,array multiplier,multiplier design,logic design,controllability,vlsi,design for testability,hardware,fault coverage,observability,vectors | Observability,Controllability,Fault coverage,Computer science,Electronic engineering,Test pattern generators,Real-time computing,Multiplier (economics),Very-large-scale integration,Binary number,Built-in self-test | Conference |
ISBN | Citations | PageRank |
0-8186-7129-7 | 15 | 1.11 |
References | Authors | |
14 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| D. Gizopoulos | 1 | 269 | 21.51 |
| A. Paschalis | 2 | 358 | 31.08 |
| Y. Zorian | 3 | 499 | 47.97 |