Abstract | ||
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This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation. |
Year | DOI | Venue |
---|---|---|
2013 | 10.1587/transele.E96.C.920 | IEICE TRANSACTIONS ON ELECTRONICS |
Keywords | Field | DocType |
time amplifier, feed-forward, CMOS, integrated circuits, design for testability | Current-feedback operational amplifier,Distributed amplifier,Operational transconductance amplifier,Direct-coupled amplifier,Linear amplifier,FET amplifier,Electronic engineering,Cascade amplifier,Engineering,Electrical engineering,Operational amplifier | Journal |
Volume | Issue | ISSN |
E96C | 6 | 1745-1353 |
Citations | PageRank | References |
1 | 0.37 | 6 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kiichi Niitsu | 1 | 126 | 38.14 |
Naohiro Harigai | 2 | 6 | 2.58 |
Takahiro J. Yamaguchi | 3 | 176 | 35.24 |
Haruo Kobayashi | 4 | 1 | 0.37 |