Abstract | ||
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This paper investigates a 3D die-stacking based VLSI integration strategy, so-called 2.5D integration, which can potentially overcome many problems stumbling the development of monolithic System-on-Chip (SoC). In this paper, we review available fabrication technologies and testing solutions for the new integration strategy. We also propose a design driven system implementation schema for this new integration strategy. A layout synthesis framework is under development by us to analyze typical "what if" questions and resolve major physical attributes for a 2.5D system according to the design specification and constraints. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1109/ASPDAC.2004.1337617 | ASP-DAC |
Keywords | Field | DocType |
layout synthesis framework,system integration,monolithic system-on-chip,major physical attribute,system implementation schema,new integration strategy,design specification,available fabrication technology,vlsi integration strategy,3d ic,system on chip,integrated circuit design,vlsi | Integrated circuit layout,Computer science,IC layout editor,Electronic engineering,Implementation,Three-dimensional integrated circuit,Physical design,Design specification,Very-large-scale integration,System integration | Conference |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-8175-0 | 22 |
PageRank | References | Authors |
4.22 | 18 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yangdong (Steven) Deng | 1 | 22 | 4.22 |
Wojciech Maly | 2 | 1976 | 352.57 |