Title
SoftSig: software-exposed hardware signatures for code analysis and optimization
Abstract
AbstractMany code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficiently and with low complexity with hardware signatures.To enable flexible use of signatures, this paper proposes to expose a Signature Register File to the software through a rich ISA. The software has great flexibility to decide, for each signature,which addresses to collect and which addresses to disambiguate against. We call this architecture SoftSig. In addition, as an example of SoftSig use, we show how to detect redundant function calls efficiently and eliminate them dynamically. We call this algorithm MemoiSE. On average for five popular applications, MemoiSE reduces the number of dynamic instructions by 9.3%, thereby reducing the execution time of the applications by 9%.
Year
DOI
Venue
2009
10.1145/1353534.1346300
SIGARCH
Keywords
Field
DocType
runtime optimization,memory disambiguation,multi-core architectures,data mining,optimization,hardware,parallel programming,resource management,strontium,debugging
Program optimization,Resource management,Static program analysis,Logic testing,Computer science,Parallel computing,Software,Computer hardware,Debugging
Journal
Volume
Issue
ISSN
36
1
0163-5964
Citations 
PageRank 
References 
3
0.46
16
Authors
4
Name
Order
Citations
PageRank
James Tuck156433.06
Wonsun Ahn21736.89
Luis Ceze32183125.93
Josep Torrellas43838262.89