Name
Abstract | ||
|---|---|---|
Low power IEEE 802.11n single input single output (SISO) wireless LAN (WLAN) baseband LSI has been developed for mobile applications. The multiple low power technologies such as on-chip power gating and high throughput technologies for expanding idle time are applied to the LSI. By minimizing always-on circuits and implementing them using thick gate-oxide transistors, 7uW stand-by power consumption is achieved with negligible shutdown/restart transition time. The built-in wake-up timer and on-chip CPU enables continuous transmit/receive operation without an external intervention. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/COOLCHIPS.2011.5890931 | COOL Chips |
Keywords | Field | DocType |
low power,on-chip cpu,transition time,on-chip power gating,mobile application,stand-by power consumption,single output,multiple low power technology,idle time,single input,baseband lsi,chip,logic gate,throughput,low power electronics,system on a chip,logic gates | Mobile radio,Baseband,Logic gate,System on a chip,Electronic engineering,Power gating,Engineering,Timer,High throughput technology,Low-power electronics | Conference |
ISBN | Citations | PageRank |
978-1-61284-882-2 | 0 | 0.34 |
References | Authors | |
1 | 14 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daisuke Taki | 1 | 2 | 0.77 |
| Tatsuo Shiozawa | 2 | 0 | 0.68 |
| Kuniaki Ito | 3 | 1 | 1.06 |
| Youichiro Shiba | 4 | 0 | 0.34 |
| Kouji Horisaki | 5 | 0 | 0.34 |
| Hirotsugu Kajihara | 6 | 10 | 2.46 |
| Toshiyuki Yamagishi | 7 | 11 | 2.99 |
| Masahiro Sekiya | 8 | 1 | 1.98 |
| Akira Yamaga | 9 | 0 | 0.68 |
| Tetsuya Fujita | 10 | 62 | 14.04 |
| Hiroyuki Hara | 11 | 1 | 0.73 |
| Masanori Kuwahara | 12 | 0 | 0.34 |
| Toshio Fujisawa | 13 | 92 | 15.13 |
| Yasuo Unekawa | 14 | 32 | 5.89 |