Abstract | ||
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This paper presents a 1-GS/s, 12-bit SiGe BiCMOS D/A converter combined with high-speed low-spurious BiCMOS current switches and an efficient calibration method for current mismatch. Experimental results show a reduction in INL and DNL errors from +35.5/-62.2 LSB to +4.1/-3.4 LSB and from +8.1/-10.3 LSB to +6.2/-1.2 LSB, respectively, after calibration. SFDR performance is 72.3 dBc at output frequency of 1.82 MHz and 50.0 dBc at output frequency of 334.39 MHz, when the sampling clock frequency is 1 GHz. Power consumption is about 950 mW at 100.48MHz output frequency and -3.3 V power supply. |
Year | DOI | Venue |
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2003 | 10.1109/ISCAS.2003.1205710 | ISCAS (1) |
Keywords | Field | DocType |
direct digital frequency synthesizer,334.39 mhz,calibration,sige,semiconductor materials,950 mw,100.48 mhz,-3.3 v,1.82 mhz,bicmos integrated circuits,high-speed integrated circuits,current mismatch,sige bicmos d/a converter,direct digital synthesis,1 ghz,calibration method,ge-si alloys,high-speed current switch,12 bit,digital-analogue conversion,sampling methods,switches,frequency | BiCMOS,Computer science,12-bit,Spurious-free dynamic range,Electronic engineering,dBc,Electrical engineering,Direct digital synthesizer,Clock rate,Silicon-germanium,Least significant bit | Conference |
Volume | ISBN | Citations |
1 | 0-7803-7761-3 | 1 |
PageRank | References | Authors |
0.58 | 2 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kwang-hyun Baek | 1 | 129 | 26.82 |
Myung-Jun Choe | 2 | 23 | 6.98 |
Edward Merlo | 3 | 2 | 1.69 |
Sung-Mo Steve Kang | 4 | 1198 | 213.14 |