Abstract | ||
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FinFET devices promise to replace traditional MOSFETs because of superior ability in controlling leakage and minimizing short channel effects while delivering a strong drive current. We investigate in this paper the gate sizing of finFET devices, and we provide a comparison with 32nm bulk CMOS. Wider finFET devices are built utilizing multiple parallel fins between the source and drain. Independent gating of the finFET's double gates allows significant reduction in leakage current. We perform temperature-aware circuit optimization by modeling delay using temperature-dependent parameters, and by imposing constraints that limit the maximum allowable number of parallel fins. We show that finFET circuits are superior in performance and produce less static power when compared to 32nm circuits |
Year | DOI | Venue |
---|---|---|
2006 | 10.1145/1146909.1147047 | San Francisco, CA |
Keywords | Field | DocType |
finfet device,multiple parallel fin,strong drive current,independent gating,superior ability,bulk mosfets,finfet circuit,gate sizing,wider finfet device,double gate,finfets vs,parallel fin,bulk cmos,short channel effect,design,leakage current | Gate sizing,Fin,Leakage (electronics),Computer science,Communication channel,Electronic engineering,CMOS,MOSFET,Electronic circuit,Electrical engineering | Conference |
ISSN | ISBN | Citations |
0738-100X | 1-59593-381-6 | 33 |
PageRank | References | Authors |
2.29 | 8 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Brian Swahn | 1 | 44 | 4.59 |
Soha Hassoun | 2 | 535 | 241.27 |