An analytical energy model to accelerate FPGA logic architecture investigation. - Citegraph

Paper Info

Title
An analytical energy model to accelerate FPGA logic architecture investigation.

Year	DOI	Venue
2011	10.1109/FPT.2011.6132683	FPT
Keywords	Field	DocType
critical path,design method,logic design,field programmable gate array,design automation,solid modeling,integrated circuit,field programmable gate arrays	CAD,Logic synthesis,Lookup table,Computer architecture,Computer science,Parallel computing,Field-programmable gate array,Robustness (computer science),Electronic design automation,Solid modeling,Cluster analysis,Computer engineering	Conference
Citations	PageRank	References
4	0.53	26
Authors
2

Authors (2 rows)

Cited by (4 rows)

References (26 rows)

Name	Order	Citations	PageRank
Senthilkumar Thoravi Rajavel	1	21	1.25
Ali Akoglu	2	157	29.40

1