Title
A novel methodology for transistor-level power estimation
Abstract
Transistor-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In this paper, we introduce a method which extends the Monte-Carlo approach for deriving the average power dissipation of a circuit using transistor-level power simula- tors. To reduce the simulation time, we propose a mixed- level extrapolation technique to speed up the convergence rate of the process, and thereby to achieve a good balance between simulation time and accuracy. Experimental results show that this is a promising method for deriving the accurate power dissipation of a circuit within reasonable time budget.
Year
DOI
Venue
1996
10.1145/252493.252574
ISLPED
Keywords
Field
DocType
power dissipation,convergence rate,monte carlo
Dissipation,Computer science,Power factor,Electronic engineering,CMOS,Extrapolation,Rate of convergence,Electronic circuit,Transistor,Estimator
Conference
ISBN
Citations 
PageRank 
0-7803-3571-6
6
0.54
References 
Authors
11
5
Name
Order
Citations
PageRank
Shi-Yu Huang176670.53
Kwang-Ting Cheng25755513.90
Kuang-chien Chen334730.84
Mike Tien-Chien Lee460.54
T. Lee560.54