Title
Compiler Optimization to Reduce Cache Power with Victim Cache
Abstract
Victim cache can buffer blocks discarded from the cache on a miss before going to the next lower-level memory to improve performance. Compared with the previous work, rather than only improve performance, we design a modified victim cache to reduce power consumption by minimizing accesses to L2 cache, miss rate, and miss penalty in this paper. With the help of this new victim cache, we can turn on/off cache block in a software way to save power and improve performance. The proposed approach can analyze an application, perform scheduling, and then insert the instrumention instructions in the code to control victim cache. The results shows that the proposed approach can improve performance about 6.5%, reduce 32.66% of cache miss, and save 4.19% of power consumption with 2k direct-mapped cache at the cost only of 1.9% code expansion on average.
Year
DOI
Venue
2012
10.1109/UIC-ATC.2012.36
UIC/ATC
Keywords
Field
DocType
victim cache,new victim cache,instrumention instruction,code expansion,direct-mapped cache,cache block,power consumption,reduce cache power,compiler optimization,modified victim cache,l2 cache,compiler,computer architecture,optimization,hardware,cache
Cache-oblivious algorithm,Cache invalidation,Cache pollution,Cache,Computer science,Cache algorithms,Real-time computing,Page cache,Cache coloring,Smart Cache,Operating system
Conference
Citations 
PageRank 
References 
1
0.37
8
Authors
3
Name
Order
Citations
PageRank
Cheng-Yu Lee1656.70
Jen-Chieh Chang282.22
Rong-Guey Chang39914.70