Name
Title | ||
|---|---|---|
95%-lower-BER 43%-lower-power intelligent solid-state drive (SSD) with asymmetric coding and stripe pattern elimination algorithm. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISSCC.2011.5746283 | ISSCC |
Keywords | Field | DocType |
shannon limit,error correcting code,reliability,encoding,ber,electric field,low power electronics,measurement uncertainty,computer architecture,capacitance | Flash memory,Low-density parity-check code,Computer science,Algorithm,NAND gate,Error detection and correction,Hot-carrier injection,Electronic engineering,Solid-state drive,Electrical engineering,Noisy-channel coding theorem,Low-power electronics | Conference |
Citations | PageRank | References |
20 | 4.56 | 3 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shuhei Tanakamaru | 1 | 121 | 18.35 |
| Chinglin Hung | 2 | 20 | 4.56 |
| Atsushi Esumi | 3 | 20 | 4.89 |
| Mitsuyoshi Ito | 4 | 20 | 4.89 |
| Kai Li | 5 | 24 | 14.53 |
| Ken Takeuchi | 6 | 88 | 43.27 |